Senior FPGA Design Engineer - Designing high speed digital hardware in Xilinx or Altera FPGAs

The Emerging Technologies Group (ETG) focuses on creating solutions in new and adjacent markets built around advanced video, voice, and data communications. The ETG creates an environment for small but fast-moving teams that allows us to cultivate new ideas, using an easily replicated process and set of best practices, to bring new solutions to new markets in a coordinated fashion with the rest of Cisco

We currently have an opening for an FPGA Design Engineer to work in the TelePresence System Business Unit (TSBU) of our Emerging Technologies Group - ETG.

TelePresence is a virtual presence experience that uses advanced visual, audio, and interactive technologies to create an in person experience at a virtual conference table. TelePresence is one of the more recent examples of how Cisco is changing the way we work, live, play, and learn.

The FPGA Design Engineer will define hardware architecture and provide leadership for overall FPGA integration efforts. Will be responsible for performing design of state-of-the-art video FPGAs. Will assist with trouble-shooting system and module-level firmware at all levels and have the primary responsibility of integrating the various modules into a released build. Position is critical to meeting project delivery requirements.

Requires solid knowledge of digital high-speed design, timing, electrical analysis, Verilog or VHDL for simulation and synthesis, and current experience in FPGA implementation and lab integration/debug.

BSEE (MSEE preferred)

Must have minimum of 7 years of experience designing high speed digital hardware in Xilinx or Altera FPGAs.

Position requires solid theoretical Audio, Video and Image processing understanding as well as strong simulation/coding and implementation background.

Qualified candidates will have very strong LAB experience using scopes and logic analyzers.

Direct experience using Digital Clock Manager, or embedded Phase Lock Loop design required.

Must have expert knowledge of logic design, test bench development, Verilog and/or VHDL, and experience with design tools such as ModelSim, Synplicity, Xilinx ISE and Altera Quartus.

In addition to detailed FPGA process experience, strong teamwork, communication, and documentation skills are essential.

Working knowledge of PowerPC processor interface design, DSP, ADC/DAC operation and interfaces, SDRAM/DDR memory are highly desirable.

Strong Perl, TCL, and automated scripting skills desired